pRAM-256 architecture

The pRAM-256 processes 256 pRAM neurons and can update the synaptic weights using an internal reinforcement training algorithm.

To maintain a high processing rate during training, the input vectors for each neuron are kept on-chip in a vector cache.

The on-chip output list allows the output of any pRAM to be assigned to one input of any other pRAM. This applies to the local module, containing 256 pRAMs, and also up to five adjacent pRAM modules. Neural states are communicated between modules using the serial ports.

The pRAM-256 may be halted so that the external SRAM, containing weights and connection pointer information, can be updated from an external host, or downloaded to another computer.

The pRAM-256 can be placed in a training or a non-training mode, as required. The mode can be changed at the end of any pass.

pRAM ArchitectureBack


T G Clarkson, August 1995