INTRODUCTION TO LOGIC DESIGN

Lecture 16

TTL and CMOS logic families

Most logic circuits come in both TTL and CMOS versions. TTL is the older technology and uses transistor-transistor logic (bipolar); CMOS uses complementary MOS circuits which use much less power in the quiescent state.

CMOS circuits consume more power as the switching frequency increases and this can approach TTL levels at high clock frequencies.

TTL

Most TTL devices come in several versions. The 54 prefix is a military part which will operate over an extended temperature range (-55 to +125° C). The 74 prefix is the commercial part (0 to 70° C). The leters in the middle indicate the speed and power consumption.

no letter	normal TTL	standard circuit	30MHz	150mW
S	Schottky	fast and power hungry	100MHz	250mW
LS	low-power Schottky	less power than normal TTL	30MHz	45mW
L	low-power	and very slow	6MHz	20mW
H	high-power	and fairly fast	30MHz	200mW
ALS	advanced low-power Schottky	faster than LS	60MHz	20mW
C	CMOS	not TTL! See next section.	6MHz	100µW
HC	CMOS	not TTL! See next section	50MHz	200µW

For standard TTL, IIH is the current drawn by a high input and is small (~40µA). IIL is the current that must be drawn out of an input to pull it low and is much higher than IIH (~-0.8mA). The reason for this can be seen in the diagram below of a 7400 2-input NAND gate, where a logic '1' turns the input transistor OFF (almost no current) and a logic '0' turns it on.

CMOS

CMOS circuits can be powered from 5V supplies, but will also work from 3V to 15V supplies. The maximum speed is reduced at lower supply voltages. CMOS circuits take negligible current at rest and only consume measurable power when switching. They therefore run at lower temperatures and require smaller power supplies; this increases their reliability.

C	CMOS	Low power, slow.	6MHz	100µW
HC	CMOS	Performance similar to or exceeding TTL.	50MHz	200µW

Thresholds

A TTL circuit, supplied from 5V, will recognise a voltage between 2.0V and 5V as a logic '1' and a voltage between 0V and 0.8V as a logic '0'. Typically, a TTL gate will see voltages of >2.4V and <0.4V respectively. Voltages between 0.8V and 2.0V are not allowed and, if applied to a TTL input, will lead to uncertain operation.

CMOS circuits allow voltages of >3.5V to be used as a logic '1' and voltages of <1.5V for logic '0'. The margin between a '0' and '1' is thus 2.0V for CMOS and only 1.2V for TTL. CMOS has a higher tolerance to noise as a result.

Fan-in and Fan-out

The number of inputs for a given gate is the fan-in and this is fixed at fabrication time.

The number of gates a given output can drive is the fan-out. It is usually specified in terms of the number of gates of a similar type that a particular output can drive, and is normally between 10 and 20. In other words, a 74LS00 output is capable of driving up to 20 74LS00 input gates. A 74LS00 gate is capable of driving a lower number of 74, 74H or 74S inputs as these types require higher input currents.

Connecting different families together

There are occasions when TTL and CMOS circuits have to be mixed in the same system, although this situation is normally avoided.

Care should be taken over the slightly different logic thresholds given above and the fan-out, to ensure correct operation.

There is a CMOS family, HCT, which operates as the HC type but has modified input thresholds equivalent to TTL chips. This family is used to interface between TTL levels and CMOS circuits. There is no problem the other way, CMOS can easily be driven from TTL, if required.

Open outputs

Open-collector outputs (open-drain in CMOS) are used in some versions of TTL gates to allow a wired-OR connection to be used (see later). Several gates will share a common pull-up resistor. This form of connection can only force the common output LOW; it cannot force it high. The output is normally HIGH as a result of the pull-up resistor.

The speed of switching is lower with the passive pull-up resistor, than when an active pull-up is used as in the case of the 7400 gate shown above. However, switching speed is not normally an issue with wired-OR connections.

There are other reasons why an open-collector output might be used:

more output current might be required and a resistor can be selected to allow this current to flow and
the load resistor can be connected to a different supply voltage (other than +5V) to provide an interface to other circuitry.

Useful functions

ENABLE and INVERTING/NON-INVERTING gates

In the upper diagram shown, an AND gate is used as a switch, or an enable gate, to pass the signal A.
When the switch is in the upper position ('1') then the signal A appears at Y, whether A is '1' or '0'.
When the switch is in the lower position ('0') then a logic '0' always appears at Y, whatever the state of A.

In the lower diagram, an exclusive-OR gate is used to pass a signal in its true or complemented state, according to the switch setting.
When the switch is in the lower position ('0') then the true value of A appears at Y; i.e. when A=1, Y=1 and when A=0, Y=0.
When the switch is in the upper position ('1') then the signal A is inverted and appears at Y; i.e. when A=0, Y=1 and when A=1, Y=0.

Wired-OR connections

These use open-collector (OC) gates as described above. Any one of the OC gates whose output goes low will pull the common output low. This connection is used in microprocessor circuits where several devices want to flag that a certain condition exists (or that an event has occurred).

Tri-state buffers

A tri-state output has a third state in addition to the logic states 0 and 1. When the output is placed into a high-impedance state, it is effectively isolated from whatever it is connected to. The output then floats and takes the state of the signal driving the line to which it is connected. Tri-state outputs are used to form bus systems where more than one output driver must be connected together.

Care must be taken with tri-state outputs to ensure that only one line drives a line at any time. This is achieved by ensuring that only one enable signal is active for a set of gates which are connected.

In the diagram shown, the enable signal is active-LOW and this is the connection commonly found in computer circuits.

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