Tutorial: 24 March 1998

1. Describe how a paged memory management unit (PMMU) is used to determine access to RAM from tasks running on a microprocessor.
   • A microprocessor has a 32-bit address bus. If a PMMU is used to control 16 Mbytes of RAM and the PMMU contains 128 internal registers, what is the page size?
   • Using a diagram, show how the microprocessor, PMMU and RAM are connected.
2. Briefly describe the role of a cache controller in a microprocessor system.
   • What similarities are there between the control of a PMMU's registers and a cache controller's registers?
   • What are the effects of increasing the page size in a paged memory management system?
     Discuss the trade-offs between cost and execution speed with different sized memory pages.
   • Explain what is meant by the 'hit ratio' in a cache.