Answers to 1992 paper

6. Explain some of the factors which gave rise to the development of RISC processors.
In your view, what are the distinguishing features between the early RISC processors and their contemporary CISC processors?
Are the reasons given above (concerning factors and distinguishing features) still valid in the light of the latest microprocessor designs?
Explain what is meant by the term 'superscalar' in relation to a microprocessor. What techniques are necessary in order to produce a superscalar processor?

The main factors are:

i) complex instructions large chip area increased cost and reduced VLSI yield,

ii) the frequency of use of complex instructions may not be very high, the 'cost' of their inclusion outweighs their usefulness, (e.g. 10 instructions account for 80% of code; 30 instructions account for 99% of code, in survey),

iii) simple, regular instructions of fixed length make for more efficient instruction decoder design,

iv) the on-chip space released can be used for more advanced features,

v) the increased yield for smaller designs is more cost-effective

vi) compilers do not use the available instruction set efficiently.

a) The main distinguishing features for early RISC are:

i) small, regular instruction set

ii) considerably fewer transistors (25,000 vs 250,000)

iii) instructions of uniform size

iv) most instructions execute in a single cycle

v) heavily pipelined

vi) high performance

b) The reasons above are not always valid today as:

VLSI technology has improved - it is feasible to put many more transistors on a chip today

CISC processors have adopted many of the 'RISC' features, and include pipelining, Harvard architecture, hardwired instructions (not microcoded), compiler technology has moved on etc.

c) Superscalar means that more than one instruction may be completed per clock cycle.

Pipelining aims to leave no unused clock cycles so that an instruction completes every cycle. If each instruction requires an external bus access, then scalar performance is the ideal. With many instructions requiring no external access (i.e. many registers so register-to-register transfers are very likely) then superscalar performance can be achieved.